Emerging Nano Technology and Intergrated Systems Lab.

School of Electrical Engineering, KAIST, 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Republic of Korea

Tel. +82-042-350-7450

Copyright (c) 2019 ENTIS lab. All Rights Reserved


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  1. S. Tan, P. Lin, H. Yeon, S. Choi, Y. Park and J. Kim, Perspective: Uniform Switching of Artificial Synapses for Large-Scale Neuromorphic Arrays, APL Materials, 6, 120901 (2018)
  2. S. Choi*, S. Tan*, Z. Li, Y. Kim, C. Choi, P. Chen, H. Yeon, S. Yu and J. Kim, SiGe Epitaxial Memory for Neuromorphic Computing with Reproducible High Performance Based on Engineered Dislocations. Nature Materials, 17, 335-340 (2018) (Highlighted in News & Views of Nature Materials, Spotlighted in MIT main page, MIT news)
  3. Y. Kim, S. Cruz, K. Lee, B. Alawode, C. Choi, Y. Song, J. Johnson, C. Heidelberger, W. Kong, S. Choi, K. Qiao, I. Almansouri, E. Fitzgerald, J. Kong, A. Kolpak, J. Hwang, and J. Kim, Remote epitaxy through graphene for two-dimensional material based layer transfer, Nature, 544, 340-343 (2017)
  4. S. Choi*, J. Shin*, J. Lee and W. Lu, Experimental Demonstration of Feature Extraction and Dimensionality Reduction using Memristor Networks, Nano Letters, 17, 3113-3118 (2017). (Highlighted in Nature Nanotechnology.)
  5. S. Choi*, P. Sheridan*, and W. D. Lu, Data Clustering using Memristor Networks, Scientific Reports, 5, 10492. (2015)
  6. S. Kim, C. Du, P. Sheridan, W. Ma, S. Choi, and W. D. Lu, Experimental Demonstration of a Second-Order Memristor and Its Ability to Biorealistically Implement Synaptic Plasticity, Nano Letters,15(3), 2203-2211. (2015)
  7. S. Kim*, S. Choi*, J. Lee, and W. Lu, Tuning Resistive Switching Characteristics of Tantalum Oxide Memristors through Si Doping, ACS Nano, 8(10), 10262-10269. (2014)
  8. Y. Yang, P. Gao, L. Li, X. Pan, S. Tappertzhofen, S.Choi, R. Waser, I. Valov, and W. Lu, Electrochemical Dynamics of Nanoscale Metallic Inclusions in Dielectrics, Nature Communications. 5, 4232. (2014)
  9. S. Choi, J. Lee, and W. Lu, Retention Failure Analysis of Metal-Oxide Based Resistive Memory, Applied Physics Letters, 105, 113510. (2014)
  10. S. Kim, S. Choi, and W. Lu, Comprehensive Physical Model of Dynamic Resistive Switching in an Oxide Memristor, ACS Nano, 8(3), 2369-2376. (2014)
  11. S. Choi, Y. Yang, and W. Lu, Random Telegraph Noise and Resistance Switching Analysis of Oxide Based Resistive Memory. Nanoscale, 6, 400-404. (2014)
  12. Y. Yang, S. Choi, and W. Lu, Oxide Heterostructure Resistive Memory. Nano Letters, 13, 2908 (2013).
  13. S. Gaba, P. Sheridan, J. Jiantao, S. Choi, and W. Lu, Stochastic Memristive Devices for Computing and Neuromorphic Applications. Nanoscale, 5, 5872 (2013)
  14. T. Moon, L. Chen, S. Choi, C. Kim, and W. Lu, Efficient Si Nanowire Array Transfer via Bi-Layer Structure Formation Through Metal-Assisted Chemical Etching. Adv. Func. Mater. doi: 10.1002/adfm.201303180. (2013)
  15. S. Gaba, S. Choi, P. Sheridan, T. Chang, Y. Yang, and W. Lu, Improvement of RRAM Device Performance Through On-Chip Resistors. Mater. Res. Soc. Symp. Proc. 1430, 177 (2012).
* Equally contributed.